BibSLEIGH
BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
EDIT!
CC-BY
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
2 × France
3 × Germany
3 × USA
Collaborated with:
H.Meyr R.Leupers A.Nohl O.Schliebusch G.Ascheid A.Hoffmann M.Hohenauer A.Wieferink J.Ceng T.Kogel H.Scharwächter S.Pees V.Greive W.Sheng A.Chattopadhyay M.Steinert K.Karuri O.Wahlen H.v.Someren
Talks about:
processor (6) explor (4) architectur (3) instruct (3) model (3) methodolog (2) synthesi (2) generat (2) flexibl (2) system (2)

Person: Gunnar Braun

DBLP DBLP: Braun:Gunnar

Contributed to:

DATE 20052005
DAC 20042004
DATE DF 20042004
DATE v2 20042004
DAC 20032003
DATE 20032003
DAC 20022002
DATE 20012001

Wrote 9 papers:

DATE-2005-CengHLAMB #c #compilation #modelling #semantics
C Compiler Retargeting Based on Instruction Semantics Models (JC, MH, RL, GA, HM, GB), pp. 1150–1155.
DAC-2004-BraunNSCHSLM #approach #consistency #design #flexibility #novel
A novel approach for flexible and consistent ADL-driven ASIP design (GB, AN, WS, JC, MH, HS, RL, HM), pp. 717–722.
DATE-DF-2004-SchliebuschCLAMSBN #architecture #implementation #synthesis
RTL Processor Synthesis for Architecture Exploration and Implementation (OS, AC, RL, GA, HM, MS, GB, AN), pp. 156–160.
DATE-v2-2004-HohenauerSKWKLAMBS #c #compilation #generative #modelling
A Methodology and Tool Suite for C Compiler Generation from ADL Processor Models (MH, HS, KK, OW, TK, RL, GA, HM, GB, HvS), pp. 1276–1283.
DATE-v2-2004-WieferinkKLAMBN #communication #framework #multi
A System Level Processor/Communication Co-Exploration Methodology for Multi-Processor System-on-Chip Platform (AW, TK, RL, GA, HM, GB, AN), pp. 1256–1263.
DAC-2003-NohlGBALSM #architecture #encoding #modelling #synthesis #using
Instruction encoding synthesis for architecture exploration using hierarchical processor models (AN, VG, GB, AH, RL, OS, HM), pp. 262–267.
DATE-2003-BraunWSLMN #abstraction #memory management #multi
Processor/Memory Co-Exploration on Multiple Abstraction Levels (GB, AW, OS, RL, HM, AN), pp. 10966–10973.
DAC-2002-NohlBSLMH #architecture #flexibility #performance #simulation
A universal technique for fast and flexible instruction-set architecture simulation (AN, GB, OS, RL, HM, AH), pp. 22–27.
DATE-2001-HoffmannNPBM #development #generative #quality #tool support #using
Generating production quality software development tools using a machine description language (AH, AN, SP, GB, HM), pp. 674–678.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.