3 × USA
C.Cheng R.Wang B.Salefski L.Liu W.Dai R.Lindelof H.Chen A.B.Kahng J.F.MacDonald P.Suaris B.Yao Z.Zhu
system (2) placement (1) multigrid (1) synthesi (1) shortest (1) communic (1) steiner (1) cluster (1) circuit (1) algebra (1)
Person: Nan-Chi Chou
Wrote 3 papers:
- DAC-2009-WangCSC #graph #power management #synthesis #using
- Low power gated bus synthesis using shortest-path Steiner graph for system-on-chip communications (RW, NCC, BS, CKC), pp. 166–171.
- DAC-2003-ChenCCKMSYZ #algebra #clustering #layout #multi
- An algebraic multigrid solver for analytical placement with layout based clustering (HC, CKC, NCC, ABK, JFM, PS, BY, ZZ), pp. 794–799.
- DAC-1994-ChouLCDL #clustering #logic
- Circuit Partitioning for Huge Logic Emulation Systems (NCC, LTL, CKC, WJD, RL), pp. 244–249.