BibSLEIGH corpus
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Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
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Travelled to:
1 × Spain
1 × USA
Collaborated with:
S.Makineni L.N.Bhuyan
Talks about:
multiprocessor (1) microprocessor (1) architectur (1) framework (1) character (1) process (1) pentium (1) switch (1) packet (1) memori (1)

Person: Ravi R. Iyer

DBLP DBLP: Iyer:Ravi_R=

Contributed to:

HPCA 20042004
HPCA 19991999

Wrote 2 papers:

HPCA-2004-MakineniI #architecture
Architectural Characterization of TCP/IP Packet Processing on the Pentium M Microprocessor (SM, RRI), pp. 152–163.
HPCA-1999-IyerB #framework #latency #memory management #multi
Switch Cache: A Framework for Improving the Remote Memory Access Latency of CC-NUMA Multiprocessors (RRI, LNB), pp. 152–160.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.