BibSLEIGH corpus
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Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
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Travelled to:
1 × France
1 × Mexico
3 × USA
Collaborated with:
J.R.Goodman A.Kägi H.W.Cain M.Marden M.H.Lipasti S.T.Srinivasan H.Akkary A.Gandhi M.Upton T.Karnagel R.Dementiev K.Lai T.Legler B.Schlegel W.Lehner
Talks about:
transact (2) synchron (2) improv (2) lock (2) architectur (1) throughput (1) program (1) pipelin (1) perform (1) databas (1)

Person: Ravi Rajwar

DBLP DBLP: Rajwar:Ravi

Contributed to:

HPCA 20142014
ASPLOS 20042004
ASPLOS 20022002
HPCA 20012001
HPCA 20002000

Wrote 5 papers:

HPCA-2014-KarnagelDRLLSL #database #in memory #performance #transaction
Improving in-memory database index performance with Intel® Transactional Synchronization Extensions (TK, RD, RR, KL, TL, BS, WL), pp. 476–487.
ASPLOS-2004-SrinivasanRAGU #pipes and filters
Continual flow pipelines (STS, RR, HA, AG, MU), pp. 107–119.
ASPLOS-2002-RajwarG #execution #source code #transaction
Transactional lock-free execution of lock-based programs (RR, JRG), pp. 5–17.
HPCA-2001-CainRML #architecture #evaluation #java
An Architectural Evaluation of Java TPC-W (HWC, RR, MM, MHL), pp. 229–240.
HPCA-2000-RajwarKG #throughput
Improving the Throughput of Synchronization by Insertion of Delays (RR, AK, JRG), pp. 168–179.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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