Travelled to:3 × USA
Collaborated with:∅ K.S.Brace R.E.Bryant V.Singhal C.Pixley R.K.Brayton
Talks about:implement (1) synthesi (1) sequenti (1) circuit (1) tutori (1) system (1) packag (1) effici (1) design (1) valid (1)
Person: Richard L. Rudell
DBLP: Rudell:Richard_L=
Contributed to:
199619951990Wrote 3 papers:
- DAC-1996-Rudell #design #logic #named #synthesis #tutorial
- Tutorial: Design of a Logic Synthesis System (RLR), pp. 191–196.
- DAC-1995-SinghalPRB
- The Validity of Retiming Sequential Circuits (VS, CP, RLR, RKB), pp. 316–321.
- DAC-1990-BraceRB #implementation #performance
- Efficient Implementation of a BDD Package (KSB, RLR, REB), pp. 40–45.