BibSLEIGH corpus
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Travelled to:
1 × USA
Collaborated with:
G.Gad-El-Karim S.D.Huss
Talks about:
analog (2) test (2) perform (1) generat (1) circuit (1) sensit (1) layout (1) integr (1) order (1) optim (1)

Person: Ronald S. Gyurcsik

DBLP DBLP: Gyurcsik:Ronald_S=

Contributed to:

DAC 19911991

Wrote 2 papers:

DAC-1991-Gad-El-KarimG #generative #layout #performance
Generation of Performance Sensitivities for Analog Cell Layout (GGEK, RSG), pp. 500–505.
DAC-1991-HussG #testing
Optimal Ordering of Analog Integrated Circuit Tests to Minimize Test Time (SDH, RSG), pp. 494–499.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.