Travelled to:3 × USA
Collaborated with:Y.Ding D.F.Wong C.C.N.Chu C.Chu
Talks about:optim (2) rout (2) base (2) lithographi (1) throughput (1) manufactur (1) quadrupl (1) pattern (1) spacer (1) layout (1)
Person: Wai-Kei Mak
DBLP: Mak:Wai=Kei
Contributed to:
201520141995Wrote 3 papers:
- DAC-2015-DingCM #self
- Detailed routing for spacer-is-metal type self-aligned double/quadruple patterning lithography (YD, CCNC, WKM), p. 6.
- DAC-2014-DingCM #layout #optimisation #throughput
- Throughput Optimization for SADP and E-beam based Manufacturing of 1D Layout (YD, CC, WKM), p. 6.
- DAC-1995-MakW #logic #on the
- On Optimal Board-Level Routing for FPGA-Based Logic Emulation (WKM, DFW), pp. 552–556.