BibSLEIGH
BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
EDIT!
CC-BY
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
1 × France
Collaborated with:
G.Li Y.Ding Yu Ji 0002 Youhui Zhang W.Chen Youyang Zhang Xinfeng Xie S.Li Peiqi Wang 0001 Xing Hu 0001 K.Ma X.Li Mahmut Taylan Kandemir J.Sampson V.Narayanan Jinyang Li 0002 T.Wu Zhibo Wang Y.Liu
Talks about:
architectur (2) quantum (2) network (2) neural (2) fog (2) superconduct (1) interconnect (1) reconfigur (1) nonvolatil (1) neuromorph (1)

Person: Yuan Xie 0001

DBLP DBLP: 0001:Yuan_Xie

Contributed to:

DATE 20132013
ASPLOS 20182018
ASPLOS 20192019
ASPLOS 20202020

Wrote 6 papers:

DATE-2013-Xie #memory management
Future memory and interconnect technologies (YX0), pp. 964–969.
ASPLOS-2018-JiZC0 #compilation #hardware #network
Bridge the Gap between Neural Networks and Neuromorphic Hardware with a Neural Network Compiler (YJ0, YZ, WC, YX0), pp. 448–460.
ASPLOS-2018-MaLKSN0WWL0 #named #optimisation
NEOFog: Nonvolatility-Exploiting Optimizations for Fog Computing (KM, XL, MTK, JS, VN, JL0, TW, ZW, YL, YX0), pp. 782–796.
ASPLOS-2019-JiZXLWHZX #architecture #configuration management #named #stack
FPSA: A Full System Stack Solution for Reconfigurable ReRAM-based NN Accelerator Architecture (YJ0, YZ, XX, SL, PW0, XH0, YZ, YX0), pp. 733–747.
ASPLOS-2019-LiDX #problem #quantum
Tackling the Qubit Mapping Problem for NISQ-Era Quantum Devices (GL, YD, YX0), pp. 1001–1014.
ASPLOS-2020-LiD0 #architecture #design #performance #quantum #towards
Towards Efficient Superconducting Quantum Processor Architecture Design (GL, YD, YX0), pp. 1031–1045.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.