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Travelled to:
1 × Germany
1 × USA
Collaborated with:
Q.Xu K.Chakrabarty X.Liu F.Yuan
Talks about:
test (2) interconnect (1) architectur (1) function (1) suppli (1) signal (1) pseudo (1) layout (1) integr (1) extern (1)

Person: Yubin Zhang

DBLP DBLP: Zhang:Yubin

Contributed to:

DATE 20102010
DAC 20072007

Wrote 2 papers:

DATE-2010-LiuZYX #power management #pseudo #testing
Layout-aware pseudo-functional testing for critical paths considering power supply noise effects (XL, YZ, FY, QX), pp. 1432–1437.
DAC-2007-XuZC #architecture #fault #optimisation
SOC Test Architecture Optimization for Signal Integrity Faults on Core-External Interconnects (QX, YZ, KC), pp. 676–681.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.