Travelled to:
2 × Germany
4 × France
Collaborated with:
F.Azaïs M.Renovell L.Latorre P.Nouet A.Dargelas C.Gauthron V.Beroulle S.Bernard J.Dufourd J.Françon P.Lienhardt P.Hazard F.Pressecq É.F.Cota L.Carro M.Lubaszewski
Talks about:
analog (3) implement (2) circuit (2) model (2) cmos (2) bist (2) methodolog (1) histogram (1) character (1) capacitor (1)
Person: Yves Bertrand
DBLP: Bertrand:Yves
Contributed to:
Wrote 8 papers:
- DATE-2002-BeroulleBLN #on the #using
- On the Use of an Oscillation-Based Test Methodology for CMOS Micro-Electro-Mechanical Systems (VB, YB, LL, PN), p. 1120.
- DATE-2001-AzaisBBR #implementation #linear
- Implementation of a linear histogram BIST for ADCs (FA, SB, YB, MR), pp. 590–595.
- DATE-2000-CotaRABCL #reuse
- Reuse of Existing Resources for Analog BIST of a Switch Capacitor Filte (ÉFC, MR, FA, YB, LC, ML), pp. 226–230.
- DATE-1999-LatorreBHPN #design #modelling
- Design, Characterization & Modelling of a CMOS Magnetic Field Sensor (LL, YB, PH, FP, PN), pp. 239–243.
- DATE-1998-RenovellAB #implementation #multi
- Optimized Implementations of the Multi-Configuration DFT Technique for Analog Circuits (MR, FA, YB), pp. 815–821.
- EDTC-1997-DargelasGB #multi #named
- MOSAIC: a multiple-strategy oriented sequential ATPG for integrated circuits (AD, CG, YB), pp. 29–36.
- EDTC-1997-RenovellAB
- On-chip analog output response compaction (MR, FA, YB), pp. 568–572.
- TAPSOFT-1993-BertrandDFL #algebra #development #geometry #modelling #specification
- Algebraic Specification and Development in Geometric Modeling (YB, JFD, JF, PL), pp. 75–89.