Travelled to:1 × France
1 × USA
4 × Germany
Collaborated with:G.Vandersteen P.Wambacq L.D.Locht S.Bronckers P.Dobrovolný S.Donnay M.Engels I.Bolsens J.Borremans C.Soens G.V.d.Plas S.Jenei R.Pintelon A.Geis P.Nuzzo J.Ryckaert J.Craninckx J.Schoukens
Talks about:analysi (4) methodolog (2) transceiv (2) circuit (2) effici (2) analog (2) simul (2) estim (2) error (2) rail (2)
Person: Yves Rolain
DBLP: Rolain:Yves
Contributed to:
20102007200620052001
2000Wrote 7 papers:
- DATE-2010-GeisNRRVC
- An 11.6-19.3mW 0.375-13.6GHz CMOS frequency synthesizer with rail-to-rail operation (AG, PN, JR, YR, GV, JC), pp. 697–701.
- DATE-2007-BorremansLWR #analysis #multi #using
- Nonlinearity analysis of Analog/RF circuits using combined multisine and volterra analysis (JB, LDL, PW, YR), pp. 261–266.
- DATE-2007-BronckersSPVR #analysis #interactive #simulation #verification
- Interactive presentation: Simulation methodology and experimental verification for the analysis of substrate noise on LC-VCO’s (SB, CS, GVdP, GV, YR), pp. 1520–1525.
- DATE-2006-VandersteenBDR
- Systematic stability-analysis method for analog circuits (GV, SB, PD, YR), pp. 150–155.
- DATE-2005-VandersteenLJRP #framework #modelling #scalability
- Estimating Scalable Common-Denominator Laplace-Domain MIMO Models in an Errors-in-Variables Framework (GV, LDL, SJ, YR, RP), pp. 1076–1081.
- DATE-2001-VandersteenWRSDEB #estimation #multi #performance
- Efficient bit-error-rate estimation of multicarrier transceivers (GV, PW, YR, JS, SD, ME, IB), pp. 164–168.
- DAC-2000-VandersteenWRDDEB #data flow #performance #simulation
- A methodology for efficient high-level dataflow simulation of mixed-signal front-ends of digital telecom transceivers (GV, PW, YR, PD, SD, ME, IB), pp. 440–445.