Randy H. Katz
Proceedings of the Second International Conference on Architectural Support for Programming Languages and Operating Systems
ASPLOS, 1987.

@proceedings{ASPLOS-1987,
	acmid         = "36206",
	address       = "Palo Alto, California, USA",
	editor        = "Randy H. Katz",
	isbn          = "0-8186-0805-6",
	publisher     = "{ACM Press}",
	title         = "{Proceedings of the Second International Conference on Architectural Support for Programming Languages and Operating Systems}",
	volume        = "SIGARCH Computer Architecture News 15(5), SIGOPS Operating System Review 21(4), SIGPLAN Notices 22(10)",
	year          = 1987,
}

Contents (26 items)

8 ×#architecture
5 ×#multi
3 ×#compilation
3 ×#hardware
3 ×#performance
3 ×#programming language
2 ×#case study
2 ×#memory management
2 ×#named
2 ×#parallel

ASPLOS-1987-Wirth #architecture #hardware #programming language

Hardware Architectures for Programming Languages and Programming Languages for Hardware Architectures (NW), pp. 2–8.

ASPLOS-1987-BeckKT #multi

VLSI Assist For a Multiprocessor (BB, BK, SST), pp. 10–20.

ASPLOS-1987-BisianiF #architecture #parallel #programming

Architectural Support for Multilanguage Parallel Programming on Heterogeneous Systems (RB, AF), pp. 21–30.

ASPLOS-1987-RashidTYGBBBC #architecture #independence #memory management #multi

Machine-Independent Virtual Memory Management for Paged Uniprocessor and Multiprocessor Architectures (RFR, AT, MY, DBG, RVB, DLB, WJB, JC), pp. 31–39.

ASPLOS-1987-HayesFWZ #architecture #execution #programming language

An Architecture for the Direct Execution of the Forth Programming Language (JRH, MEF, RLW, TZ), pp. 42–49.

ASPLOS-1987-SteenkisteH #hardware #lisp #type checking

Tags and Type Checking in Lisp: Hardware and Software Approaches (PS, JLH), pp. 50–59.

ASPLOS-1987-DavidsonV #complexity #memory management #performance #set

The Effect of Instruction Set Complexity on Program Size and Memory Performance (JWD, RAV), pp. 60–64.

ASPLOS-1987-AtkinsonM

The Dragon Processor (RRA, EMM), pp. 65–69.

ASPLOS-1987-Goodman #multi

Coherency for Multiprocessor Virtual Address Caches (JRG), pp. 72–81.

ASPLOS-1987-CargillL #debugging #hardware #profiling

Cheap Hardware Support for Software Debugging and Profiling (TAC, BNL), pp. 82–83.

ASPLOS-1987-GeorgiouPR #implementation

An Experimental Coprocessor for Implementing Persistant Objects on an IBM 4381 (CJG, SLP, PLR), pp. 84–87.

ASPLOS-1987-MagenheimerPPZ #architecture #integer #multi #precise

Integer Multiplication and Division on the HP Precision Architecture (DJM, LP, KP, DZ), pp. 90–99.

ASPLOS-1987-WallP #experience #using

The Mahler Experience: Using and Intermediate Language as the Machine Description (DWW, MLP), pp. 100–104.

ASPLOS-1987-WeissS #case study #compilation #pipes and filters

A Study of Scalar Compilation Techniques for Pipelined Supercomputers (SW, JES), pp. 105–109.

ASPLOS-1987-BushSUH #compilation

Compiling Smalltalk-80 to a RISC (WRB, ADS, DU, PNH), pp. 112–116.

ASPLOS-1987-ChowCHKW #how #question

How Many Addressing Modes are Enough? (FCC, SC, MIH, EK, LW), pp. 117–121.

ASPLOS-1987-Massalin #named

Superoptimizer — A Look at the Smallest Program (HM), pp. 122–126.

ASPLOS-1987-TakiNNI #architecture #evaluation #performance

Performance and Architectural Evaluation of the PSI Machine (KT, KN, HN, MI), pp. 128–135.

ASPLOS-1987-BorrielloCDN #case study #prolog

RISCs versus CISCs for Prolog: A Case Study (GB, ARC, PBD, MNN), pp. 136–145.

ASPLOS-1987-Kieburtz #architecture #symbolic computation

A RISC Architecture for Symbolic Computation (RBK), pp. 146–155.

ASPLOS-1987-DitzelM #c #design #programming language #trade-off

Design Tradeoffs to Support the C Programming Language in the CRISP Microprocessor (DRD, HRM), pp. 158–163.

ASPLOS-1987-ThackerS #multi #named

Firefly: A Multiprocessor Workstation (CPT, LCS), pp. 164–172.

ASPLOS-1987-Clark #performance #pipes and filters

Pipelining and Performance in the VAX 8800 Processor (DWC), pp. 173–177.

ASPLOS-1987-ColwellNOPR #architecture #compilation #scheduling

A VLIW Architecture for a Trace Scheduling Compiler (RPC, RPN, JJO, DBP, PKR), pp. 180–192.

ASPLOS-1987-LevinthalHPL #parallel

Parallel Computers for Graphics Applications (AL, PH, MP, JL), pp. 193–198.

ASPLOS-1987-SmithDVKRFSL

The ZS-1 Central Processor (JES, GED, BDV, SDK, CMR, DLF, KRS, JL), pp. 199–204.