An efficient transistor-level piecewise-linear macromodeling approach for model order reduction of nonlinear circuits
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Xiaoda Pan, Fan Yang, Xuan Zeng, Yangfeng Su
An efficient transistor-level piecewise-linear macromodeling approach for model order reduction of nonlinear circuits
DATE, 2010.

DATE 2010
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@inproceedings{DATE-2010-PanYZS,
	author        = "Xiaoda Pan and Fan Yang and Xuan Zeng and Yangfeng Su",
	booktitle     = "{Proceedings of the 14th Conference on Design, Automation and Test in Europe}",
	pages         = "1673--1676",
	publisher     = "{IEEE}",
	title         = "{An efficient transistor-level piecewise-linear macromodeling approach for model order reduction of nonlinear circuits}",
	year          = 2010,
}

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