Tag #megamodelling
49 papers:
MoDELS-2018-Stevens #flexibility #towards- Towards sound, optimal, and flexible building from megamodels (PS), pp. 301–311.
- MoDELS-2015-SalayKSC #model management
- Enriching megamodel management with collection-based operators (RS, SK, ADS, MC), pp. 236–245.
- MoDELS-2015-SimmondsPBS #evolution #modelling #process
- A megamodel for Software Process Line modeling and evolution (JS, DP, MCB, LS), pp. 406–415.
DATE-2014-UbolliGBC #linear- Sensitivity-based weighting for passivity enforcement of linear macromodels in power integrity applications (AU, SGT, MB, AC), pp. 1–6.
SLE-2013-DiskinKM #design pattern- Mapping-Aware Megamodeling: Design Patterns and Laws (ZD, SK, TSEM), pp. 322–343.
DAC-2011-YeLGY #framework #novel- A novel framework for passive macro-modeling (ZY, YL, MG, ZY), pp. 546–551.
- DATE-2011-GobbatoCG #parallel #scalability
- A parallel Hamiltonian eigensolver for passivity characterization and enforcement of large interconnect macromodels (LG, AC, SGT), pp. 26–31.
ASE-2010-HilliardMMP #architecture #framework- Realizing architecture frameworks through megamodelling techniques (RH, IM, HM, PP), pp. 305–308.
SAC-2010-JouaultVBDBB #coordination #weaving- Inter-DSL coordination support by combining megamodeling and model weaving (FJ, BV, HB, GD, YB, JB), pp. 2011–2018.
- DATE-2010-ChineaGDDK #on the #performance
- On the construction of guaranteed passive macromodels for high-speed channels (AC, SGT, DD, TD, LK), pp. 1142–1147.
- DATE-2010-PanYZS #approach #order #performance #reduction
- An efficient transistor-level piecewise-linear macromodeling approach for model order reduction of nonlinear circuits (XP, FY, XZ, YS), pp. 1673–1676.
CAiSE-2009-SalayME #modelling #using- Using Macromodels to Manage Collections of Related Models (RS, JM, SME), pp. 141–155.
- ASE-2008-SalayME #modelling
- Managing Models through Macromodeling (RS, JM, SME), pp. 447–450.
- MoDELS-2007-GasevicKH #metamodelling #on the
- On Metamodeling in Megamodels (DG, NK, MH), pp. 91–105.
- MoDELS-2007-GasevicKH #metamodelling #on the
- On Metamodeling in Megamodels (DG, NK, MH), pp. 91–105.
- DAC-2007-WangLP #design
- Parameterized Macromodeling for Analog System-Level Design Exploration (JW, XL, LTP), pp. 940–943.
- DAC-2007-WangLR #automation #named #parametricity #variability
- PV-PPV: Parameter Variability Aware, Automatically Extracted, Nonlinear Time-Shifted Oscillator Macromodels (ZW, XL, JSR), pp. 142–147.
- DAC-2006-LaiR #multi #performance #robust
- A multilevel technique for robust and efficient extraction of phase macromodels of digitally controlled oscillators (XL, JSR), pp. 1017–1022.
- DAC-2006-WeiD #composition #development
- Systematic development of nonlinear analog circuit macromodels through successive operator composition and nonlinear model decoupling (YW, AD), pp. 1023–1028.
- DAC-2006-ZhaoPSYF #algorithm #linear #performance #programming #using
- A fast on-chip decoupling capacitance budgeting algorithm using macromodeling and linear programming (MZ, RP, SS, SY, YF), pp. 217–222.
- DAC-2005-DingV #performance
- A combined feasibility and performance macromodel for analog circuits (MD, RV), pp. 63–68.
- DAC-2005-DongR #automation #performance
- Automated nonlinear Macromodelling of output buffers for high-speed digital applications (ND, JSR), pp. 51–56.
- DAC-2005-TiwaryR #on-demand #scalability
- Scalable trajectory methods for on-demand analog macromodel extraction (SKT, RAR), pp. 403–408.
- DAC-2005-WeiD #behaviour #development
- Systematic development of analog circuit structural macromodels through behavioral model decoupling (YW, AD), pp. 57–62.
- DATE-2005-DingV #approach #modelling #performance
- A Two-Level Modeling Approach to Analog Circuit Performance Macromodeling (MD, RV), pp. 1088–1089.
- DAC-2004-MuttrejaRRJ #automation #embedded #energy #performance
- Automated energy/performance macromodeling of embedded software (AM, AR, SR, NKJ), pp. 99–102.
- DATE-v2-2004-ElviraMAG #generative #performance #simulation
- A Macromodelling Methodology for Efficient High-Level Simulation of Substrate Noise Generation (LE, FM, XA, JLG), pp. 1362–1363.
- DATE-v2-2004-WangMR #automation #predict
- Automated, Accurate Macromodelling of Digital Aggressors for Power/Ground/Substrate Noise Prediction (ZW, RM, JSR), pp. 824–829.
- DAC-2003-LiLXP #analysis
- Analog and RF circuit macromodels for system-level analysis (XL, PL, YX, LTP), pp. 478–483.
- DATE-2003-Grivet-TalociaSMC #simulation
- Combined FDTD/Macromodel Simulation of Interconnected Digital Devices (SGT, ISS, IAM, FGC), pp. 10536–10541.
- DATE-2003-XuLLP
- Noise Macromodel for Radio Frequency Integrated Circuits (YX, XL, PL, LTP), pp. 10150–10155.
- DAC-2002-AmickGL #concept #interface
- Macro-modeling concepts for the chip electrical interface (BWA, CRG, DL), pp. 391–394.
- DAC-2002-BodapatiN #analysis
- High-level current macro-model for power-grid analysis (SB, FNN), pp. 385–390.
- DAC-2002-CaoLCC #delivery #named #power management
- HiPRIME: hierarchical and passivity reserved interconnect macromodeling engine for RLKC power delivery (YC, YML, THC, CCPC), pp. 379–384.
- DAC-2002-LiuSRC #data mining #design #mining #scalability
- Remembrance of circuits past: macromodeling by data mining in large analog design spaces (HL, AS, RAR, LRC), pp. 437–442.
- DATE-2002-KhazakaN
- Compact Macromodel for Lossy Coupled Transmission Lines (RK, MSN), p. 1114.
- DATE-2002-StievanoCMCBK #assessment
- Macromodeling of Digital I/O Ports for System EMC Assessment (ISS, FGC, IAM, ZC, WDB, GAK), pp. 1044–1048.
- DAC-2001-TanRLJ #energy
- High-level Software Energy Macro-modeling (TKT, AR, GL, NKJ), pp. 605–610.
- DATE-1999-JochensKSN #component
- A New Parameterizable Power Macro-Model for Datapath Components (GJ, LK, ES, WN), p. 29–?.
- DAC-1998-ChenR
- A Power Macromodeling Technique Based on Power Sensitivity (ZC, KR), pp. 678–683.
- DAC-1998-DengiR #2d #bound
- Boundary Element Method Macromodels for 2-D Hierachical Capacitance Extraction (EAD, RAR), pp. 218–223.
- DAC-1997-ForzanFG #performance #standard
- Accurate and Efficient Macromodel of Submicron Digital Standard Cells (CF, BF, CG), pp. 633–637.
- DAC-1997-GuptaN #estimation
- Power Macromodeling for High Level Power Estimation (SG, FNN), pp. 365–370.
- DAC-1996-DartuTP #simulation
- RC-Interconnect Macromodels for Timing Simulation (FD, BT, LTP), pp. 544–547.
- DAC-1995-WempleY #analysis #using
- Mixed-Signal Switching Noise Analysis Using Voronoi-Tessellated Substrate Macromodels (ILW, ATY), pp. 439–444.
- DAC-1994-HaqueEC #multi #simulation
- A New Time-Domain Macromodel for Transient Simulation of Uniform/Nonuniform Multiconductor Transmission-Line Interconnections (MH, AEZ, SC), pp. 628–633.
- DAC-1985-Matson
- Macromodeling of digital MOS VLSI Circuits (MDM), pp. 141–151.
- DAC-1982-LightnerH #algorithm #functional #testing
- Implication algorithms for MOS switch level functional macromodeling implication and testing (MRL, GDH), pp. 691–698.
- DAC-1979-HsiehR #functional #latency
- Macrosimulation with Quasi-general Symbolic FET Macromodel and Functional Latency (HYH, NBR), pp. 229–234.
