Cross-layer optimized placement and routing for FPGA soft error mitigation
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Keheng Huang, Yu Hu, Xiaowei Li
Cross-layer optimized placement and routing for FPGA soft error mitigation
DATE, 2011.

DATE 2011
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@inproceedings{DATE-2011-HuangHL,
	author        = "Keheng Huang and Yu Hu and Xiaowei Li",
	booktitle     = "{Proceedings of the 15th Conference on Design, Automation and Test in Europe}",
	isbn          = "978-1-61284-208-0",
	pages         = "58--63",
	publisher     = "{IEEE}",
	title         = "{Cross-layer optimized placement and routing for FPGA soft error mitigation}",
	year          = 2011,
}

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