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Travelled to:
2 × USA
Collaborated with:
C.E.Wu L.M.Ni J.K.Jr. N.C.E.Srinivas
Talks about:
system (3) design (3) verif (3) formal (2) autom (2) base (2) represent (1) circuit (1) reason (1) digit (1)

Person: Anthony S. Wojcik

DBLP DBLP: Wojcik:Anthony_S=

Contributed to:

DAC 19871987
DAC 19841984
DAC 19831983

Wrote 3 papers:

DAC-1987-WuWN #automation #design #representation #rule-based #verification
A Rule-Based Circuit Representation for Automated CMOS Design and Verification (CFEW, ASW, LMN), pp. 786–792.
DAC-1984-WojcikKS #automation #design #reasoning #verification
A formal design verification system based on an automated reasoning system (ASW, JKJ, NCES), pp. 641–647.
DAC-1983-Wojcik #design #verification
Formal design verification of digital systems (ASW), pp. 228–234.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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