Travelled to:1 × France
1 × USA
Collaborated with:M.Fujita M.Yamazaki M.T.Lee Y.Hsu
Talks about:design (2) model (2) synthesi (1) identif (1) symbol (1) switch (1) specif (1) domain (1) level (1) check (1)
Person: Ben Chen
DBLP: Chen:Ben
Contributed to:
1996
1994Wrote 2 papers:
- DAC-1996-LeeHCF #design #modelling #synthesis #using
- Domain-Specific High-Level Modeling and Synthesis for ATM Switch Design Using VHDL (MTCL, YCH, BC, MF), pp. 585–590.
- EDAC-1994-ChenYF #debugging #design #identification #model checking
- Bug Identification of a Real Chip Design by Symbolic Model Checking (BC, MY, MF), pp. 132–136.