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Travelled to:
2 × USA
Collaborated with:
W.Hu Y.Chen J.Kuan Y.Cheng Y.Chen I.Tsai L.Chan C.J.Liu
Talks about:
circuit (2) analog (2) yield (2) methodolog (1) behavior (1) approach (1) enhanc (1) effici (1) design (1) scale (1)

Person: Chin-Cheng Kuo

DBLP DBLP: Kuo:Chin=Cheng

Contributed to:

DAC 20122012
DAC 20102010

Wrote 2 papers:

DAC-2012-KuoHCKC #design #monte carlo #performance
Efficient trimmed-sample Monte Carlo methodology and yield-aware design flow for analog circuits (CCK, WYH, YHC, JFK, YKC), pp. 1113–1118.
DAC-2010-KuoCTCL #approach #behaviour
Behavior-level yield enhancement approach for large-scaled analog circuits (CCK, YLC, ICT, LYC, CNJL), pp. 903–908.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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