Travelled to:1 × France
1 × Germany
Collaborated with:∅ M.Raffelsieper M.R.Mousavi Y.Zorian M.Nicolaidis P.Muhmenthaler D.Y.Lepejian K.Veelenturf
Talks about:statement (1) descript (1) verilog (1) minimum (1) librari (1) tutori (1) design (1) modul (1) deriv (1) check (1)
Person: Chris W. H. Strolenberg
DBLP: Strolenberg:Chris_W=_H=
Contributed to:
20102000Wrote 3 papers:
- DATE-2010-RaffelsieperMS #library
- Checking and deriving module paths in Verilog cell library descriptions (MR, MRM, CWHS), pp. 1506–1511.
- DATE-2000-Strolenberg
- Stay Away from Minimum Design-Rule Values (CWHS), pp. 71–72.
- DATE-2000-ZorianNMLSV #tutorial
- Tutorial Statement (YZ, MN, PM, DYL, CWHS, KV), p. 66.