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Travelled to:
1 × Denmark
1 × Israel
4 × USA
Collaborated with:
I.Beer M.Benjamin T.Heyman S.Barner A.Gringauze J.Dushina S.Ben-David Y.Wolfsthal O.Grumberg A.Schuster R.Gewirtzman M.Yoeli A.Hartman G.Mas R.Smeets G.Biran T.Arons M.Slavkin Y.Nustov M.Farkas K.Holtz A.Long D.King S.Barret C.Eisner L.Gluhovsky A.Landver P.Paanah Y.Rodeh G.Ronin
Talks about:
methodolog (2) generat (2) system (2) formal (2) verif (2) model (2) check (2) test (2) reconstruct (1) backtrack (1)

Person: Daniel Geist

DBLP DBLP: Geist:Daniel

Contributed to:

CAV 20022002
DAC 20012001
CAV 20002000
DAC 19991999
CAV 19971997
CAV 19941994

Wrote 8 papers:

CAV-2002-BarnerGG #backtracking #locality #re-engineering #reduction
Symbolic Localization Reduction with Reconstruction Layering and Backtracking (SB, DG, AG), pp. 65–77.
DAC-2001-DushinaBG #generative #testing
Semi-Formal Test Generation with Genevieve (JD, MB, DG), pp. 617–622.
CAV-2000-HeymanGGS #analysis #parallel #reachability #scalability
Achieving Scalability in Parallel Reachability Analysis of Very Large Circuits (TH, DG, OG, AS), pp. 20–35.
DAC-1999-BenjaminGHMSW #case study #generative #testing
A Study in Coverage-Driven Test Generation (MB, DG, AH, GM, RS, YW), pp. 970–975.
DAC-1999-GeistBASNFHLKB #verification
A Methodology for the Verification of a “System on Chip” (DG, GB, TA, MS, YN, MF, KH, AL, DK, SB), pp. 574–579.
CAV-1997-BeerBEGGHLPRRW #model checking #named
RuleBase: Model Checking at IBM (IB, SBD, CE, DG, LG, TH, AL, PP, YR, GR, YW), pp. 480–483.
CAV-1994-BeerBGGY #hardware #verification
Methodology and System for Practical Formal Verification of Reactive Hardware (IB, SBD, DG, RG, MY), pp. 182–193.
CAV-1994-GeistB #automation #model checking #performance
Efficient Model Checking by Automated Ordering of Transition Relation Partitions (DG, IB), pp. 299–310.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.