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Travelled to:
3 × USA
Collaborated with:
M.Swaminathan K.Bharath K.J.Han K.Uriu T.Yamada R.Mandrekar K.Srinivasan
Talks about:
system (3) packag (3) integr (3) electr (2) applic (2) power (2) interconnect (1) methodolog (1) placement (1) dimension (1)

Person: Ege Engin

DBLP DBLP: Engin:Ege

Contributed to:

DAC 20082008
DAC 20072007
DAC 20062006

Wrote 4 papers:

DAC-2008-BharathES #algorithm #automation #search-based #using
Automatic package and board decoupling capacitor placement using genetic algorithms and M-FDM (KB, EE, MS), pp. 560–565.
DAC-2008-HanSE #3d #equation #modelling
Electric field integral equation combined with cylindrical conduction mode basis functions for electrical modeling of three-dimensional interconnects (KJH, MS, EE), pp. 421–424.
DAC-2007-BharathESUY #performance #simulation
Computationally Efficient Power Integrity Simulation for System-on-Package Applications (KB, EE, MS, KU, TY), pp. 612–617.
DAC-2006-MandrekarBSES #analysis
System level signal and power integrity analysis methodology for system-in-package applications (RM, KB, KS, EE, MS), pp. 1009–1012.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.