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Travelled to:
2 × USA
Collaborated with:
C.A.Papachristou H.Koc M.T.Kandemir Ö.Özturk
Talks about:
processor (2) chip (2) synthesi (1) recomput (1) schedul (1) specif (1) regist (1) memori (1) applic (1) access (1)

Person: Ehat Ercanli

DBLP DBLP: Ercanli:Ehat

Contributed to:

DAC 20072007
DAC 19961996

Wrote 2 papers:

DAC-2007-KocKEO #embedded #memory management #multi #using
Reducing Off-Chip Memory Access Costs Using Data Recomputation in Embedded Chip Multi-processors (HK, MTK, EE, ÖÖ), pp. 224–229.
DAC-1996-ErcanliP #scheduling #synthesis
A Register File and Scheduling Model for Application Specific Processor Synthesis (EE, CAP), pp. 35–40.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.