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Travelled to:
1 × USA
Collaborated with:
D.D.Ling
Talks about:
methodolog (1) submicron (1) analysi (1) suppli (1) design (1) power (1) vlsi (1) nois (1) deep (1) chip (1)

Person: Howard H. Chen

DBLP DBLP: Chen:Howard_H=

Contributed to:

DAC 19971997

Wrote 1 papers:

DAC-1997-ChenL #analysis #design #power management
Power Supply Noise Analysis Methodology for Deep-Submicron VLSI Chip Design (HHC, DDL), pp. 638–643.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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