Travelled to:1 × France
Collaborated with:S.Sahni S.Bailey E.Marschner J.Lewis P.J.Ashenden
Talks about:rectangular (1) algorithm (1) triangul (1) product (1) planar (1) linear (1) improv (1) design (1) verif (1) graph (1)
Person: Jayaram Bhasker
DBLP: Bhasker:Jayaram
Contributed to:
2004
1986Wrote 2 papers:
- DATE-DF-2004-BaileyMBLA #design #verification
- Improving Design and Verification Productivity with VHDL-200x (SB, EM, JB, JL, PJA), pp. 332–335.
- DAC-1986-BhaskerS #algorithm #graph #linear
- A linear algorithm to find a rectangular dual of a planar triangulated graph (JB, SS), pp. 108–114.