Travelled to:7 × USA
Collaborated with:S.Nahar E.Shragowitz W.N.Li J.Bhasker S.Han R.Kane J.Cohoon R.Raghavan A.Bhatt S.M.Reddy Y.Won Y.M.El-Ziq A.Lim P.Agrawal
Talks about:problem (3) circuit (3) algorithm (2) design (2) anneal (2) singl (2) simul (2) optim (2) rout (2) row (2)
Person: Sartaj Sahni
DBLP: Sahni:Sartaj
Contributed to:
199219881987198619851984198319821980Wrote 12 papers:
- DAC-1992-LiLAS #implementation #on the #problem
- On the Circuit Implementation Problem (WNL, AL, PA, SS), pp. 478–483.
- DAC-1988-LiRS #logic #on the
- On Path Selection in Combinational Logic Circuits (WNL, SMR, SS), pp. 142–147.
- DAC-1987-WonSE #hardware
- A Hardware Accelerator for Maze Routing (YW, SS, YMEZ), pp. 800–806.
- DAC-1986-BhaskerS #algorithm #graph #linear
- A linear algorithm to find a rectangular dual of a planar triangulated graph (JB, SS), pp. 108–114.
- DAC-1986-NaharS #performance
- A time and space efficient net extractor (SN, SS), pp. 411–417.
- DAC-1986-NaharSS #combinator #optimisation
- Simulated annealing and combinatorial optimization (SN, SS, ES), pp. 293–299.
- DAC-1985-HanS #algorithm
- Layering algorithms for single row routing (SH, SS), pp. 516–522.
- DAC-1985-NaharSS
- Experiments with simulated annealing (SN, SS, ES), pp. 748–752.
- DAC-1984-KaneS #design
- A systolic design rule checker (RK, SS), pp. 243–250.
- DAC-1983-CohoonS #heuristic #problem
- Heuristics for the Circuit Realization Problem (JC, SS), pp. 560–566.
- DAC-1982-RaghavanS
- Optimal single row router (RR, SS), pp. 38–45.
- DAC-1980-SahniB #automation #complexity #design #problem
- The complexity of design automation problems (SS, AB), pp. 402–411.