Travelled to:
1 × Canada
2 × USA
Collaborated with:
Z.Cao Y.Zhou T.Xu Chuanguang Zhou Min Liu 0013 Z.Wang Ran Huang W.Xiong S.Park Z.Ma L.Renganarayana X.Zhang N.Ge V.Bala P.Huang J.Zheng T.Sheng D.Yuan S.Pasupathy
Talks about:
misconfigur (2) select (2) semiconductor (1) constraint (1) algorithm (1) synchron (1) attribut (1) schedul (1) problem (1) exploit (1)
Person: Jiaqi Zhang
DBLP: Zhang:Jiaqi
Contributed to:
Wrote 5 papers:
- ASPLOS-2014-ZhangRZGBXZ #correlation #detection #named
- EnCore: exploiting system environment and correlation information for misconfiguration detection (JZ, LR, XZ, NG, VB, TX, YZ), pp. 687–700.
- SOSP-2013-XuZHZSYZP
- Do not blame users for misconfigurations (TX, JZ, PH, JZ, TS, DY, YZ, SP), pp. 244–259.
- OSDI-2010-XiongPZZM #ad hoc #harmful
- Ad Hoc Synchronization Considered Harmful (WX, SP, JZ, YZ, ZM), pp. 163–176.
- CASE-2016-ZhouCLZ #algorithm #clustering #constraints #reduction
- Model reduction method based on selective clustering ensemble algorithm and Theory of Constraints in semiconductor wafer fabrication (CZ, ZC, ML0, JZ), pp. 885–890.
- CASE-2017-WangCHZ #case study #problem #scheduling
- A study on attribute selection for job shop scheduling problem (ZW, ZC, RH, JZ), pp. 1032–1037.