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Travelled to:
1 × USA
Collaborated with:
G.Kim H.Yoon H.Jang P.Gratz K.H.Yum E.J.Kim Elvira Teran P.V.Gratz D.A.Jiménez S.H.Pugsley C.Wilkerson
Talks about:
program (2) effici (2) interconnect (1) reconstruct (1) multicomput (1) processor (1) hierarchi (1) bandwidth (1) strategi (1) behavior (1)

Person: Jinchun Kim

DBLP DBLP: Kim:Jinchun

Contributed to:

DAC 20152015
PDP 19961996
ASPLOS 20172017

Wrote 3 papers:

DAC-2015-JangKGY0 #design
Bandwidth-efficient on-chip interconnect designs for GPGPUs (HJ, JK, PG, KHY, EJK), p. 6.
PDP-1996-KimKY #multi #performance
A New Efficient Submesh Allocation Strategy for Mesh Multicomputers (GK, JK, HY), pp. 227–234.
ASPLOS-2017-KimTGJPW #behaviour
Kill the Program Counter: Reconstructing Program Behavior in the Processor Cache Hierarchy (JK, ET, PVG, DAJ, SHP, CW), pp. 737–749.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.