Travelled to:
1 × China
1 × Mexico
5 × USA
Collaborated with:
∅ S.M.Khan C.Wilkerson Z.Wang C.Lin A.R.Alameldeen O.Mutlu C.Xu G.Sun Y.Xie J.Kulkarni M.Pericàs A.Cristal R.González M.Valero J.Kim Elvira Teran P.V.Gratz S.H.Pugsley
Talks about:
cach (5) improv (3) branch (3) dynam (3) processor (2) placement (2) program (2) predict (2) perform (2) decoupl (2)
Person: Daniel A. Jiménez
DBLP: Jim=eacute=nez:Daniel_A=
Contributed to:
Wrote 9 papers:
- HPCA-2014-KhanAWMJ #clustering #performance #using
- Improving cache performance using read-write partitioning (SMK, ARA, CW, OM, DAJ), pp. 452–463.
- HPCA-2014-WangJXSX #adaptation #hybrid #migration #policy
- Adaptive placement and migration policy for an STT-RAM-based hybrid cache (ZW, DAJ, CX, GS, YX), pp. 13–24.
- HPCA-2013-KhanAWKJ #architecture #manycore #performance #using
- Improving multi-core performance using mixed-cell cache architecture (SMK, ARA, CW, JK, DAJ), pp. 119–130.
- HPCA-2012-KhanWJ #segmentation
- Decoupled dynamic cache segmentation (SMK, ZW, DAJ), pp. 235–246.
- HPCA-2006-PericasCGJV
- A decoupled KILO-instruction processor (MP, AC, RG, DAJ, MV), pp. 53–64.
- PLDI-2005-Jimenez #branch #predict
- Code placement for improving dynamic branch prediction accuracy (DAJ), pp. 107–116.
- HPCA-2003-Jimenez #branch #predict
- Reconsidering Complex Branch Predictors (DAJ), pp. 43–52.
- HPCA-2001-JimenezL #branch #predict
- Dynamic Branch Prediction with Perceptrons (DAJ, CL), pp. 197–206.
- ASPLOS-2017-KimTGJPW #behaviour
- Kill the Program Counter: Reconstructing Program Behavior in the Processor Cache Hierarchy (JK, ET, PVG, DAJ, SHP, CW), pp. 737–749.