Travelled to:1 × Canada
2 × USA
Collaborated with:D.Chen M.D.F.Wong L.Deng F.Wu Z.Hu H.Tsui
Talks about:glitch (2) power (2) technolog (1) algorithm (1) synthesi (1) simultan (1) approach (1) generat (1) vector (1) replac (1)
Person: Lei Cheng
DBLP: Cheng:Lei
Contributed to:
20072006
2002Wrote 4 papers:
- DAC-2007-ChengCW #named #power management
- GlitchMap: An FPGA Technology Mapper for Low Power Considering Glitches (LC, DC, MDFW), pp. 318–323.
- DAC-2007-ChengCW07a #named #synthesis
- DDBDD: Delay-Driven BDD Synthesis for FPGAs (LC, DC, MDFW), pp. 910–915.
- DAC-2006-ChengDCW #algorithm #generative #performance #power management #reduction
- A fast simultaneous input vector generation and gate replacement algorithm for leakage power reduction (LC, LD, DC, MDFW), pp. 117–120.
- ICPR-v2-2002-ChengWHT #approach #equation #self
- A New Approach to Solving Kruppa Equations for Camera Self-Calibration (LC, FW, ZH, HTT), pp. 308–311.