Travelled to:2 × Germany
Collaborated with:M.Papesch K.Kapp U.G.Baitinger J.Koehl J.Bickford J.Hibbeler U.Schlichtmann R.Sommer M.Pronath A.Ripp
Talks about:design (2) bitparallel (1) manufactur (1) influenc (1) approach (1) process (1) circuit (1) variat (1) switch (1) signal (1)
Person: Markus Bühler
DBLP: B=uuml=hler:Markus
Contributed to:
20061999Wrote 2 papers:
- DATE-2006-BuhlerKBHSSPR #design #process
- DFM/DFY design for manufacturability and yield — influence of process variations in digital, analog and mixed-signal circuit design (MB, JK, JB, JH, US, RS, MP, AR), pp. 387–392.
- DATE-1999-BuhlerPKB #approach #performance #process #simulation #using
- Efficient Switching Activity Simulation under a Real Delay Model Using a Bitparallel Approach (MB, MP, KK, UGB), p. 459–?.