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Travelled to:
2 × France
Collaborated with:
H.Ymeri B.Nauwelaers K.Maex D.D.Roest S.Vandenberghe I.Karageorgos P.Raghavan J.Ryckaert Z.Tokei D.Verkest R.Baert S.Sakhare W.Dehaene
Talks about:
interconnect (2) semiconduct (1) substrat (1) approach (1) variabl (1) pattern (1) paramet (1) multipl (1) impact (1) effici (1)

Person: Michele Stucchi

DBLP DBLP: Stucchi:Michele

Contributed to:

DATE 20152015
DATE 20022002

Wrote 2 papers:

DATE-2015-KarageorgosSRRT #multi #variability
Impact of interconnect multiple-patterning variability on SRAMs (IK, MS, PR, JR, ZT, DV, RB, SS, WD), pp. 609–612.
DATE-2002-YmeriNMRSV #approach #parametricity #performance
Simple and Efficient Approach for Shunt Admittance Parameters Calculations of VLSI On-Chip Interconnects on Semiconducting Substrate (HY, BN, KM, DDR, MS, SV), p. 1113.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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