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Travelled to:
1 × France
1 × Germany
1 × USA
Collaborated with:
D.Verkest R.Baert A.Geis P.Nuzzo Y.Rolain G.Vandersteen J.Craninckx I.Karageorgos M.Stucchi P.Raghavan Z.Tokei S.Sakhare W.Dehaene A.Mallik P.Zuber T.Liu B.Chava B.Ballal P.R.D.Bario K.Croes M.Badaroglu A.Mercha
Talks about:
rail (2) interconnect (1) technolog (1) framework (1) systemat (1) frequenc (1) variabl (1) synthes (1) pattern (1) multipl (1)

Person: Julien Ryckaert

DBLP DBLP: Ryckaert:Julien

Contributed to:

DATE 20152015
DAC 20132013
DATE 20102010

Wrote 3 papers:

DATE-2015-KarageorgosSRRT #multi #variability
Impact of interconnect multiple-patterning variability on SRAMs (IK, MS, PR, JR, ZT, DV, RB, SS, WD), pp. 609–612.
DAC-2013-MallikZLCBBBCRBMV #analysis #evaluation #framework #named
TEASE: a systematic analysis framework for early evaluation of FinFET-based advanced technology nodes (AM, PZ, TTL, BC, BB, PRDB, RB, KC, JR, MB, AM, DV), p. 6.
DATE-2010-GeisNRRVC
An 11.6-19.3mW 0.375-13.6GHz CMOS frequency synthesizer with rail-to-rail operation (AG, PN, JR, YR, GV, JC), pp. 697–701.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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