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Travelled to:
1 × France
1 × Germany
Collaborated with:
C.P.Ravikumar X.Wen O.Florent A.Greiner E.H.Rejouan
Talks about:
techniqu (1) strategi (1) testabl (1) redefin (1) symbol (1) design (1) simul (1) power (1) devic (1) check (1)

Person: Mokhtar Hirech

DBLP DBLP: Hirech:Mokhtar

Contributed to:

DATE 20082008
EDAC-ETC-EUROASIC 19941994

Wrote 2 papers:

DATE-2008-RavikumarHW #power management
Test Strategies for Low Power Devices (CPR, MH, XW), pp. 728–733.
EDAC-1994-HirechFGR #design #simulation #testing
A Redefinable Symbolic Simulation Technique to Testability Design Rules Checking (MH, OF, AG, EHR), p. 668.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.