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Travelled to:
2 × France
Collaborated with:
F.Pétrot A.Faravelon L.Michel
Talks about:
simul (2) processor (1) predictor (1) translat (1) instruct (1) branch (1) binari (1) speed (1) embed (1) dynam (1)

Person: Nicolas Fournel

DBLP DBLP: Fournel:Nicolas

Contributed to:

DATE 20152015
DATE 20112011

Wrote 2 papers:

DATE-2015-FaravelonFP #branch #performance #predict #simulation
Fast and accurate branch predictor simulation (AF, NF, FP), pp. 317–320.
DATE-2011-MichelFP #embedded #simulation
Speeding-up SIMD instructions dynamic binary translation in embedded processor simulation (LM, NF, FP), pp. 277–280.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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