BibSLEIGH corpus
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Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
1 × Canada
3 × USA
Collaborated with:
V.N.Ekanayake C.K.IV S.L.Jr. B.Nkounkou R.Tate J.Kihm F.Guimbretière J.Karl
Talks about:
power (2) processor (1) asynchron (1) interact (1) consumpt (1) asymmetr (1) scalabl (1) prevent (1) network (1) display (1)

Person: Rajit Manohar

DBLP DBLP: Manohar:Rajit

Contributed to:

PLDI 20152015
CHI 20142014
ASPLOS 20042004
POPL 20022002

Wrote 4 papers:

PLDI-2015-LongfieldNMT #self #specification
Preventing glitches and short circuits in high-level self-timed chip specifications (SLJ, BN, RM, RT), pp. 270–279.
CHI-2014-KihmGKM #interactive #power management #symmetry #using
Using asymmetric cores to reduce power consumption for interactive devices with bi-stable displays (JK, FG, JK, RM), pp. 1059–1062.
ASPLOS-2004-EkanayakeKM #network #power management
An ultra low-power processor for sensor networks (VNE, CKI, RM), pp. 27–36.
POPL-2002-Manohar #design #scalability
Scalable formal design methods for asynchronous VLSI (RM), pp. 245–246.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.