Travelled to:1 × Spain
1 × Switzerland
1 × USA
2 × France
Collaborated with:L.Apvrille A.Enrici E.Amador V.Rezard D.Knorreck L.Su S.Courcambeck P.Guillemin C.Schwarz S.Guilley P.Hoogvorst Y.Mathieu J.Provost
Talks about:memori (2) bus (2) architectur (1) techniqu (1) structur (1) hierarch (1) communic (1) approach (1) suitabl (1) protect (1)
Person: Renaud Pacalet
DBLP: Pacalet:Renaud
Contributed to:
2014
2009
2009
20092004Wrote 5 papers:
- MoDELS-2014-EnriciAP #approach #communication #modelling #uml
- A UML Model-Driven Approach to Efficiently Allocate Complex Communication Schemes (AE, LA, RP), pp. 370–385.
- DAC-2009-AmadorPR #architecture #memory management #problem
- Optimum LDPC decoder: a memory architecture problem (EA, RP, VR), pp. 891–896.
- DATE-2009-SuCGSP #memory management #named #operating system
- SecBus: Operating System controlled hierarchical page-based memory bus protection (LS, SC, PG, CS, RP), pp. 570–573.
- TOOLS-EUROPE-2009-KnorreckAP #design #performance #simulation
- Fast Simulation Techniques for Design Space Exploration (DK, LA, RP), pp. 308–327.
- DATE-v2-2004-GuilleyHMPP #hardware
- CMOS Structures Suitable for Secured Hardware (SG, PH, YM, RP, JP), pp. 1414–1415.