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Travelled to:
1 × USA
2 × Germany
Collaborated with:
Y.Thonnart S.Foroutan A.Jerraya N.Coste H.Garavel H.Hermanns M.Zidouni B.Clement E.Lantreibecq B.Ramanadin P.Coulomb F.Pogodalla
Talks about:
system (3) design (3) multiprocessor (2) evalu (2) chip (2) multithread (1) architectur (1) prototyp (1) quantit (1) perform (1)

Person: Richard Hersemeule

DBLP DBLP: Hersemeule:Richard

Contributed to:

DATE 20102010
DATE 20082008
DAC 19991999

Wrote 3 papers:

DATE-2010-ForoutanTHJ #performance
An analytical method for evaluating Network-on-Chip performance (SF, YT, RH, AJ), pp. 1629–1632.
DATE-2008-CosteGHHTZ #architecture #design #embedded #evaluation #parallel #thread #validation
Quantitative Evaluation in Embedded System Design: Validation of Multiprocessor Multithreaded Architectures (NC, HG, HH, RH, YT, MZ), pp. 88–89.
DAC-1999-ClementHLRCP #design #multi #performance #prototype
Fast Prototyping: A System Design Flow Applied to a Complex System-on-Chip Multiprocessor Design (BC, RH, EL, BR, PC, FP), pp. 420–424.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.