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Travelled to:
1 × USA
Collaborated with:
V.Stojanovic R.I.Bahar J.Dworak
Talks about:
microprocessor (1) implement (1) instruct (1) protect (1) effect (1) queue (1) order (1) cost (1) out (1) ecc (1)

Person: Richard Weiss

DBLP DBLP: Weiss:Richard

Contributed to:

DAC 20062006

Wrote 1 papers:

DAC-2006-StojanovicBDW #effectiveness #implementation #queue
A cost-effective implementation of an ECC-protected instruction queue for out-of-order microprocessors (VS, RIB, JD, RW), pp. 705–708.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.