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Travelled to:
2 × Germany
2 × USA
3 × France
Collaborated with:
M.R.Mercer R.I.Bahar B.Cobb A.Zygmontowicz A.Crouch J.C.Potter N.Alves K.Nepal V.Stojanovic R.Weiss J.Wingfield S.Lee M.R.Grimaila E.Alpaslan B.Kruseman A.K.Majhi W.M.Heuvelman P.v.d.Wiel J.Liou L.Wang K.Cheng R.Kapur T.W.Williams
Talks about:
detect (3) test (3) multipl (2) effect (2) fault (2) delay (2) use (2) microprocessor (1) misdirect (1) implement (1)

Person: Jennifer Dworak

DBLP DBLP: Dworak:Jennifer

Contributed to:

DATE 20142014
DATE 20102010
DATE 20092009
DAC 20062006
DATE v2 20042004
DAC 20022002
DATE 20022002

Wrote 7 papers:

DATE-2014-ZygmontowiczDCP #network
Making it harder to unlock an LSIB: Honeytraps and misdirection in a P1687 network (AZ, JD, AC, JCP), pp. 1–6.
DATE-2010-AlpaslanDKMHW #simulation
NIM- a noise index model to estimate delay discrepancies between silicon and simulation (EA, JD, BK, AKM, WMH, PvdW), pp. 1373–1376.
DATE-2009-AlvesNDB #detection #fault #multi #using
Detecting errors using multi-cycle invariance information (NA, KN, JD, RIB), pp. 791–796.
DAC-2006-StojanovicBDW #effectiveness #implementation #queue
A cost-effective implementation of an ECC-protected instruction queue for out-of-order microprocessors (VS, RIB, JD, RW), pp. 705–708.
DATE-v2-2004-DworakCWM #detection #fault
Balanced Excitation and Its Effect on the Fortuitous Detection of Dynamic Defects (JD, BC, JW, MRM), pp. 1066–1071.
DAC-2002-LiouWCDMKW #fault #multi #performance #testing #using
Enhancing test efficiency for delay fault testing using multiple-clocked schemes (JJL, LCW, KTC, JD, MRM, RK, TWW), pp. 371–374.
DATE-2002-LeeCDGM #algorithm #detection #fault #multi #testing
A New ATPG Algorithm to Limit Test Set Size and Achieve Multiple Detections of All Faults (SL, BC, JD, MRG, MRM), pp. 94–99.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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