Travelled to:
2 × USA
Collaborated with:
F.N.Najm K.R.Heloue F.Taraporevala J.Liu
Talks about:
corner (2) cover (2) time (2) all (2) approach (1) process (1) analysi (1) static (1) wires (1) optim (1)
Person: Sari Onaissi
DBLP: Onaissi:Sari
Contributed to:
Wrote 2 papers:
- DAC-2011-OnaissiTLN #analysis #approach #performance
- A fast approach for static timing analysis covering all PVT corners (SO, FT, JL, FNN), pp. 777–782.
- DAC-2009-OnaissiHN #optimisation #process
- Clock skew optimization via wiresizing for timing sign-off covering all process corners (SO, KRH, FNN), pp. 196–201.