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Travelled to:
2 × USA
Collaborated with:
T.Sakai Y.Tsuchida H.Yasuura Y.Ooi Y.Ono H.Kano S.Yajima
Talks about:
structur (1) interact (1) arithmet (1) circuit (1) system (1) residu (1) design (1) applic (1) verif (1) simul (1)

Person: Shinji Kimura

DBLP DBLP: Kimura:Shinji

Contributed to:

DAC 19951995
DAC 19821982

Wrote 2 papers:

DAC-1995-Kimura #verification
Residue BDD and Its Application to the Verification of Arithmetic Circuits (SK), pp. 542–545.
DAC-1982-SakaiTYOOKKY #design #interactive #logic #simulation
An Interactive Simulation System for structured logic design — ISS (TS, YT, HY, YO, YO, HK, SK, SY), pp. 747–754.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.