Travelled to:
2 × USA
Collaborated with:
A.Aziz M.F.Jacome C.He G.d.Veciana
Talks about:
tune (2) nanotechnolog (1) probabilist (1) paradigm (1) silicon (1) design (1) defect (1) toler (1) fpgas (1) post (1)
Person: Stephen Bijansky
DBLP: Bijansky:Stephen
Contributed to:
Wrote 2 papers:
- DAC-2008-BijanskyA #named
- TuneFPGA: post-silicon tuning of dual-Vdd FPGAs (SB, AA), pp. 796–799.
- DAC-2004-JacomeHVB #design #fault #paradigm #probability
- Defect tolerant probabilistic design paradigm for nanotechnologies (MFJ, CH, GdV, SB), pp. 596–601.