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Travelled to:
1 × Germany
2 × France
3 × USA
Collaborated with:
A.Raghunathan K.Roy S.T.Chakradhar A.Raha A.Ranjan X.Fong J.Liu M.Shoaib V.Raghunathan S.G.Ramasubramanian A.Parandhaman R.Venkatesan A.Sabne V.J.Kozhikkottu V.Bahl X.Hua J.Li M.Philipose B.Priyantha
Talks about:
approxim (7) effici (7) comput (6) energi (5) circuit (3) synthesi (2) configur (2) qualiti (2) design (2) logic (2)

Person: Swagath Venkataramani

DBLP DBLP: Venkataramani:Swagath

Contributed to:

DAC 20152015
DATE 20152015
DATE 20142014
DAC 20132013
DATE 20132013
DAC 20122012

Wrote 11 papers:

DAC-2015-RanjanVFRR #approximate #energy #performance
Approximate storage for energy efficient spintronic memories (AR, SV, XF, KR, AR), p. 6.
DAC-2015-VenkataramaniCR #approximate #performance
Approximate computing and the quest for computing efficiency (SV, STC, KR, AR), p. 6.
DAC-2015-VenkataramaniRL #classification #energy #machine learning
Scalable-effort classifiers for energy-efficient machine learning (SV, AR, JL, MS), p. 6.
DATE-2015-RahaVRR #approximate #configuration management #energy #performance #quality
Quality configurable reduce-and-rank for energy efficient approximate computing (AR, SV, VR, AR), pp. 665–670.
DATE-2015-VenkataramaniBH #named
SAPPHIRE: an always-on context-aware computer vision system for portable devices (SV, VB, XSH, JL, JL, MP, BP, MS), pp. 1491–1496.
DATE-2015-VenkataramaniCR #approximate
Computing approximately, and efficiently (SV, STC, KR, AR), pp. 748–751.
DATE-2015-VenkatesanVFRR #energy #logic #named
Spintastic: spin-based stochastic logic for energy-efficient computing (RV, SV, XF, KR, AR), pp. 1575–1578.
DATE-2014-RanjanRVRR #approximate #named #synthesis
ASLAN: Synthesis of approximate sequential circuits (AR, AR, SV, KR, AR), pp. 1–6.
DAC-2013-RamasubramanianVPR #design #energy #named
Relax-and-retime: a methodology for energy-efficient recovery based design (SGR, SV, AP, AR), p. 6.
DATE-2013-VenkataramaniRR #approximate #configuration management #design #named #paradigm #quality
Substitute-and-simplify: a unified design paradigm for approximate and quality configurable circuits (SV, KR, AR), pp. 1367–1372.
DAC-2012-VenkataramaniSKRR #approximate #logic #named #synthesis
SALSA: systematic logic synthesis of approximate circuits (SV, AS, VJK, KR, AR), pp. 796–801.

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