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Travelled to:
1 × France
2 × USA
Collaborated with:
A.Raghunathan S.Dey R.Venkatesan A.Pan V.S.Pai S.Venkataramani A.Sabne K.Roy
Talks about:
variat (2) multithread (1) systemat (1) synthesi (1) recoveri (1) approxim (1) variabl (1) program (1) perform (1) circuit (1)

Person: Vivek J. Kozhikkottu

DBLP DBLP: Kozhikkottu:Vivek_J=

Contributed to:

DAC 20142014
DAC 20122012
DATE 20112011

Wrote 4 papers:

DAC-2014-KozhikkottuPPDR #clustering #parallel #source code #thread
Variation Aware Cache Partitioning for Multithreaded Programs (VJK, AP, VSP, SD, AR), p. 6.
DAC-2012-KozhikkottuDR #design
Recovery-based design for variation-tolerant SoCs (VJK, SD, AR), pp. 826–833.
DAC-2012-VenkataramaniSKRR #approximate #logic #named #synthesis
SALSA: systematic logic synthesis of approximate circuits (SV, AS, VJK, KR, AR), pp. 796–801.
DATE-2011-KozhikkottuVRD #analysis #named #performance #variability
VESPA: Variability emulation for System-on-Chip performance analysis (VJK, RV, AR, SD), pp. 2–7.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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