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Travelled to:
1 × Taiwan
Collaborated with:
S.Dauzère-Pérès G.Rodríguez-Verján J.Pinaton
Talks about:
semiconductor (1) manufactur (1) reduct (1) wafer (1) smart (1) sampl (1) dynam (1) risk (1)

Person: Sylvain Housseman

DBLP DBLP: Housseman:Sylvain

Contributed to:

CASE 20142014

Wrote 1 papers:

CASE-2014-HoussemanDRP #reduction
Smart dynamic sampling for wafer at risk reduction in semiconductor manufacturing (SH, SDP, GRV, JP), pp. 780–785.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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