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Travelled to:
1 × Korea
1 × Taiwan
Collaborated with:
C.Yugma G.Rodríguez-Verján J.Pinaton A.Obeid F. Barhebwa-Mushamuka S.Housseman J.Blue P.Vialletelle E.Tartiere A.Thieullen
Talks about:
semiconductor (3) manufactur (3) schedul (3) process (2) wafer (2) dynam (2) risk (2) throughput (1) constraint (1) parallel (1)

Person: Stéphane Dauzère-Pérès

DBLP DBLP: Dauz=egrave=re-P=eacute=r=egrave=s:St=eacute=phane

Contributed to:

CASE 20142014
CASE 20122012
CASE 20192019

Wrote 5 papers:

CASE-2014-HoussemanDRP #reduction
Smart dynamic sampling for wafer at risk reduction in semiconductor manufacturing (SH, SDP, GRV, JP), pp. 780–785.
CASE-2014-YugmaBDV #bibliography #integration #process #scheduling
Integration of scheduling and advanced process control in semiconductor manufacturing: review and outlook (CY, JB, SDP, PV), pp. 93–98.
CASE-2012-ObeidDY #constraints #health #parallel #scheduling
Scheduling on parallel machines with time constraints and Equipment Health Factors (AO, SDP, CY), pp. 401–406.
Dispatching of lots to dynamically reduce the wafers at risk in semiconductor manufacturing (GRV, ET, JP, SDP, AT), pp. 920–923.
CASE-2019-Barhebwa-Mushamuka #multi #optimisation #scheduling #throughput
Multi-objective optimization for Work-In-Process balancing and throughput maximization in global fab scheduling (FBM, SDP, CY), pp. 697–702.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.