Travelled to:1 × Korea
1 × Taiwan
Collaborated with:S.Dauzère-Pérès J.Pinaton S.Housseman E.Tartiere A.Thieullen
Talks about:semiconductor (2) manufactur (2) wafer (2) dynam (2) risk (2) dispatch (1) reduct (1) smart (1) sampl (1) reduc (1)
Person: Gloria Rodríguez-Verján
DBLP: Rodr=iacute=guez-Verj=aacute=n:Gloria
Contributed to:
20142012Wrote 2 papers:
- CASE-2014-HoussemanDRP #reduction
- Smart dynamic sampling for wafer at risk reduction in semiconductor manufacturing (SH, SDP, GRV, JP), pp. 780–785.
- CASE-2012-Rodriguez-VerjanTPDT
- Dispatching of lots to dynamically reduce the wafers at risk in semiconductor manufacturing (GRV, ET, JP, SDP, AT), pp. 920–923.