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Travelled to:
1 × France
1 × Germany
1 × USA
Collaborated with:
Y.Wu X.Yang Y.Diao X.Wei W.Tang
Talks about:
circuit (2) scheme (2) remov (2) wire (2) techniqu (1) arithmet (1) univers (1) general (1) complex (1) reduct (1)

Person: Tak-Kei Lam

DBLP DBLP: Lam:Tak=Kei

Contributed to:

DATE 20152015
DATE 20122012
DAC 20102010

Wrote 4 papers:

DATE-2015-DiaoLWW #reduction
A coupling area reduction technique applying ODC shifting (YD, TKL, XW, YLW), pp. 1461–1466.
DATE-2015-WeiDLW #metaprogramming
A universal macro block mapping scheme for arithmetic circuits (XW, YD, TKL, YLW), pp. 1629–1634.
DATE-2012-YangLTW #modelling
Almost every wire is removable: A modeling and solution for removing any circuit wire (XY, TKL, WCT, YLW), pp. 1573–1578.
DAC-2010-YangLW #complexity #fault #named
ECR: a low complexity generalized error cancellation rewiring scheme (XY, TKL, YLW), pp. 511–516.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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