Travelled to:1 × France
1 × Germany
Collaborated with:C.Y.Hung V.Iyengar P.Yeung M.Li D.Dressler
Talks about:challeng (2) design (2) subsystem (1) verifi (1) memori (1) integr (1) applic (1) speed (1) mobil (1) high (1)
Person: Tsunwai Gary Yip
DBLP: Yip:Tsunwai_Gary
Contributed to:
20122011Wrote 2 papers:
- DATE-2012-YipHI #3d #challenge #design #verification
- Challenges in verifying an integrated 3D design (TGY, CYH, VI), pp. 167–168.
- DATE-2011-YipYLD #challenge #design #memory management #mobile
- Challenges in designing high speed memory subsystem for mobile applications (TGY, PY, ML, DD), pp. 509–510.