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Travelled to:
1 × France
3 × USA
Collaborated with:
T.M.Jones M.Cintra A.Magni K.T.Sundararajan N.P.Topham B.Franke A.Milidonis N.Alachiotis H.Michail A.Kakarountas C.E.Goutis R.C.O.Rocha P.Petoumenos L.F.W.Góes Z.W.0001 M.Cole H.Leather
Talks about:
vector (2) partit (2) pad (2) architectur (1) processor (1) hierarchi (1) interact (1) instruct (1) scratch (1) schedul (1)

Person: Vasileios Porpodas

DBLP DBLP: Porpodas:Vasileios

Contributed to:

CGO 20152015
LCTES 20132013
HPCA 20122012
DATE 20072007
CC 20202020

Wrote 5 papers:

CGO-2015-PorpodasMJ #automation #named
PSLP: padded SLP automatic vectorization (VP, AM, TMJ), pp. 190–201.
LCTES-2013-PorpodasC #adaptation #clustering #named #scheduling
LUCAS: latency-adaptive unified cluster assignment and instruction scheduling (VP, MC), pp. 45–54.
HPCA-2012-SundararajanPJTF #clustering #energy
Cooperative partitioning: Energy-efficient cache partitioning for high-performance CMPs (KTS, VP, TMJ, NPT, BF), pp. 311–322.
DATE-2007-MilidonisAPMKG #architecture #interactive #memory management
Interactive presentation: A decoupled architecture of processors with scratch-pad memory hierarchy (AM, NA, VP, HM, AK, CEG), pp. 612–617.
CC-2020-RochaPPG0CL
Vectorization-aware loop unrolling with seed forwarding (RCOR, VP, PP, LFWG, ZW0, MC, HL), pp. 1–13.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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